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????????????????????????????????????????????????????????????????? maxim integrated products 1 typical operating circuit 19-6276; rev 0; 4/12 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX14611.related . general description the MAX14611 is a quad bidirectional logic-level transla - tor that provides the level shifting necessary to allow data transfer in a multivoltage system. externally applied volt - ages, v cc and v l , set the logic levels on either side of the device. a low-voltage logic signal present on the v l side of the device appears as a high-voltage logic signal on the v cc side of the device, and vice-versa. the device is ideal for i 2 c bus as well as mdio bus appli - cations where open-drain operation is often required. the device features a three-state output mode ( ts ). drive ts high to connect the pullup to the powered i/o port. this allows for continuous, undisrupted i 2 c operation on the powered side of the device while the level translation function is off. the MAX14611 is a pin-to-pin compatible upgrade to the max3378e in the tdfn package. the MAX14611 features enhanced high-electrostatic- discharge (esd) protection on all i/ovcc_ ports up to 6kv hbm. the device operates over the -40 n c to +85 n c extended temperature range and is available in 3mm x 3mm, 14-pin tdfn and 4.9mm x 5.1mm, 14-pin tssop packages. applications benefits and features s improved interoperability ? meets i 2 c specifications ? 10k i internal pullup resistor ? pin-to-pin compatible with the max3377e and the max3378e ? 0.9v operation on low voltage supply s robust logic-level translation ? 0.5v tolerances on all pins ? 6kv human body model esd protection on i/ovcc? lines ? thermal short-circuit protection ? short to ground fault protection on all pins ? -40 n c to +85 n c operating temperature range s increased design flexibility ? ultra-low supply current ? pullup resistor enabled with a single power supply when ts = high ? 10 i (max) transmission gate fet ? small, 14-pin, 3.0mm x 3.0mm tdfn package and 14-pin, 4.9mm x 5.1mm tssop package spi, i 2 c, and mdio level translation low-voltage asic level translation portable electronics mobile phones pos systems telecommunications equipment i /ovl_ data ts +1.8v +3.3v v l v cc +3.3v system data i/ ovcc_ +1.8v system controller 0.1f 1f MAX14611 MAX14611 quad bidirectional low-voltage logic-level translator evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com.
????????????????????????????????????????????????????????????????? maxim integrated products 2 MAX14611 quad bidirectional low-voltage logic-level translator (all voltages referenced to gnd.) v cc .......................................................................... -0.5v to +6v v l .......................................................................... -0.5v to +5.5v ts ............................................................................ -0.5v to +6v i/ovcc_ .................................................... -0.5v to (v cc + 0.5v) i/ovl_ .......................................................... -0.5v to (v l + 0.5v) short-circuit duration i/ovl_, i/ovcc_ to gnd ....... continuous continuous current ......................................................... q 50ma continuous power dissipation (t a = +70 n c) tdfn (derate 24.4mw/ n c above +70 n c) ............... 1951.2mw tssop (derate 10mw/ n c above +70 n c) ................. 796.8mw operating temperature range .......................... -40 n c to +85 n c maximum junction temperature ..................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ..................................... +260 n c tdfn-ep junction-to-ambient thermal resistance ( q ja ) ........... 41 c/w junction-to-case thermal resistance ( q jc ) .................. 8 c/w tssop junction-to-ambient thermal resistance ( q ja ) ...... 100.4 c/w junction-to-case thermal resistance ( q jc ) ................ 30 c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v cc = +1.65v to +5.5v, v l = 0.9v to the lesser of v cc + 0.3v and 5v. t a = t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v cc = +3.3v, v l = +1.8v, t a = +25 n c, unless otherwise noted.) (notes 2, 3) parameter symbol conditions min typ max units power supplies v l supply range v l 0.9 5 v v cc supply range v cc 1.65 5.5 v v l supply current i vl i/ovcc_ = v cc , i/ovl_ = v l , ts = v l 1 f a v cc supply current i vcc i/ovcc_ = v cc , i/ovl_ = v l , ts = v l 35 f a v cc shutdown mode supply current i shdn_vcc ts = gnd, i/ovcc = unconnected 0.1 1 f a ts = v cc , v l = gnd, i/ovcc = unconnected 0.1 1 v l shutdown mode supply current i shdn_vl ts = gnd 0.1 1 f a ts = v l , v cc = gnd, i/ovl_ = unconnected 0.1 1 i/ovcc_, i/ovl_, ts leakage current i leak t a = +25 n c, ts = gnd 0.1 1 f a ts input leakage current i leak_ts t a = +25 n c 1 f a v l shutdown threshold v th_vl 0.3 0.85 v v cc shutdown threshold v th_vcc 0.8 1.35 v i/ovl_ pullup resistor r vl_pu 10 k i i/ovcc_ pullup resistor r vcc_pu 10 k i
????????????????????????????????????????????????????????????????? maxim integrated products 3 MAX14611 quad bidirectional low-voltage logic-level translator electrical characteristics ( continued ) (v cc = +1.65v to +5.5v, v l = 0.9v to the lesser of v cc + 0.3v and 5v. t a = t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v cc = +3.3v, v l = +1.8v, t a = +25 n c, unless otherwise noted.) (notes 2, 3) parameter symbol conditions min typ max units i/ovl_ to i/ovcc_ dc resistance r iovl_iovcc inferred from v ol measurements 5 10 i i/ovl_ input-voltage high v ihl v l - 0.2 v i/ovl_ input-voltage low v ill 0.15 v i/ovcc_ input-voltage high v ihc v cc - 0.4 v i/ovcc_ input-voltage low v ilc 0.2 v i/ovl_ output-voltage high v ohl i/ovl_ source current = 10 f a 0.7 x v l v i/ovl_ output-voltage low v oll i/ovl_ sink current = 2ma, v i/ovcc_ p 50mv 0.4 v i/ovcc_ output-voltage high v ohc i/ovcc_ source current = 10 f a 0.7 x v cc v i/ovcc_ output voltage low v olc i/ovcc_ sink current = 2ma, v i/ovl_ p 150mv 0.4 v ts input-voltage high threshold v ih v l - 0.2 v ts input-voltage low threshold v il v l > 1.3v 0.2 v accelerator pulse duration inferred from timing measurements 30 ns v l output accelerator source impedance v l = 0.9v 70 i v l = 3.3v 15 v cc output accelerator source impedance v cc = 1.65v 50 i v cc = 5.0v 10 thermal-shutdown threshold 20 n c hysteresis +150 n c esd protection i/ovcc_ human body model, c vcc = 1 f f, c vl = 0.1 f f q 6 kv all other pins human body model q 2 kv
????????????????????????????????????????????????????????????????? maxim integrated products 4 MAX14611 quad bidirectional low-voltage logic-level translator timing characteristics (v cc = +1.65v to +5.5v, v l = +0.9v to the lesser of v cc + 0.3v and 5v, ts = v l , r l = 1m, c vcc = 1f, c vl = 0.1f, c i/ovcc_ = 15pf, c i/ovl_ = 15pf, t a = -40 n c to +85 n c, unless otherwise noted. typical values are v cc = +3.3v, v l = +1.8v, and t a = +25 n c.) (note 4) note 2: all units are 100% production tested at t a = +25c. specifications over operating temperature range are guaranteed by design. note 3: v l must be less than or equal to v cc during normal operation. however, v l can be greater than v cc during startup and shutdown conditions. note 4: all timing is 10% to 90% for rise time and 90% to 10% for fall time. note 5: not production tested; guaranteed by design. note 6: requires the external pullup resistor. parameter symbol conditions min typ max units i/ovcc_ rise time t rvcc push-pull driving (figure 1) 40 ns open-drain driving (figure 2, note 5) 100 i/ovcc_ fall time t fvcc push-pull driving (figure 1) 40 ns open-drain driving (figure 2, note 5) 50 i/ovl_ rise time t rvl push-pull driving (figure 3) 30 ns open-drain driving (figure 4, note 5) 105 i/ovl_ fall time t fvl push-pull driving (figure 3) 30 ns open-drain driving (figure 4, note 5) 30 propagation delay i/o vl-vcc push-pull driving (figure 1) 40 ns i/o vl-vcc open-drain driving (figure 2, note 5) 150 propagation delay i/o vcc-vl push-pull driving (figure 3) 30 ns i/o vcc-vl open-drain driving (figure 4, note 5) 105 channel-to-channel skew t skew input rise time/fall time < 6ns, push-pull driving 20 ns input rise time/fall time < 6ns, open-drain driving 50 maximum data rate push-pull operation 20 mbps open-drain operation (notes 5, 6) 6
????????????????????????????????????????????????????????????????? maxim integrated products 5 MAX14611 quad bidirectional low-voltage logic-level translator figure 1. push-pull driving i/ovl_ figure 2. open-drain driving i/ovl_ t rvcc t pdlh t pdhl t fvcc 90 % 90 % 50% 10% 50% 50% 10% 50% i /ovl_ ts v l v cc v l v cc i/ ovcc_ c i/ ovcc_ r l r s 50 i MAX14611 gnd i /ovl_ ts v l v cc v l v cc i/ ovcc_ gnd c i/ ovcc_ r l 1k i 1k i MAX14611 t rvcc t fvcc t pdhl t pdlh 50% 50% 90%9 0% 50% 50% 10% 10%
????????????????????????????????????????????????????????????????? maxim integrated products 6 MAX14611 quad bidirectional low-voltage logic-level translator figure 3. push-pull driving i/ovcc_ figure 4. open-drain driving i/ovcc_ i /ovl_ ts v l v cc v l v cc i/ ovcc_ r s 50 i c i/ ovl_ r l MAX14611 t rvl t fvl t pdlh t pdhl 50% 50% 50% 10% 10% 50% 90% 90% gnd t rvl t pdlh t pdhl 90 % 90 % 10% 10% 50% 50% 50% 50% t fvl i /ovl_ ts v l v cc v l v cc i/ ovcc_ MAX14611 c i/ ovl_ r l 1k i 1k i gnd
????????????????????????????????????????????????????????????????? maxim integrated products 7 typical operating characteristics (v cc = +3.3v, v l = 1.8v, r l = 1m, c l = 15pf, t a = +25c, data rate = 500kbps in open-drain operation and 8mbps in push-pull operation, unless otherwise noted.) MAX14611 quad bidirectional low-voltage logic-level translator v l supply current vs. supply voltage MAX14611 toc01 v cc (v) supply current (a) 4.95 4.40 2.20 2.75 3.30 3.85 25 50 75 100 125 150 175 200 0 1.65 5.50 driving i /ovl_ v l = 1.8v 8mbps, push-pull 500kbps, open-drain v cc supply current vs. temperature MAX14611 toc04 supply current (a) 50 100 150 200 250 300 350 400 0 temperature (c) 60 35 10 -15 -40 85 driving i /ovcc_ 8mbps, push-pull 500kbps, open-drain 100 200 300 400 600 700 800 900 500 v cc supply current vs. capacitive load MAX14611 toc06 supply current (a) 1000 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ ovl_ 8mbps, push-pull 500kbps, open-drain 20 40 60 80 120 140 160 180 100 v l supply current vs. capacitive load MAX14611 toc05 supply current (a) 200 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ ovl_ 8mbps, push-pull 500kbps, open-drain 10 20 30 40 60 70 80 90 50 rise / fall time vs. capacitive load MAX14611 toc07 rise/fall time (ns) 100 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ ovl_ 500kbps, open-drain t hl t lh 200 400 600 800 1000 v cc supply current vs. supply voltage MAX14611 toc02 v cc (v) supply current (a) 4.95 4.40 2.20 2.75 3.30 3.85 1200 0 1.65 5.50 driving i /ovl_ v l = 1.8v 8mbps, push-pull 500kbps, open-drain v l supply current vs. temperature MAX14611 toc03 supply current (a) 25 50 75 100 125 150 175 200 0 temperature (c) 60 35 10 -15 -40 85 driving i /ovcc_ 8mbps, push-pull 500kbps, open-drain
????????????????????????????????????????????????????????????????? maxim integrated products 8 typical operating characteristics (continued) (v cc = +3.3v, v l = 1.8v, r l = 1m, c l = 15pf, t a = +25c, data rate = 500kbps in open-drain operation and 8mbps in push-pull operation, unless otherwise noted.) 2 4 6 8 12 14 16 18 10 rise / fall time vs. capacitive load MAX14611 toc08 rise/fall time (ns) 20 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ ovl_ 8mbps, push-pull t lh t hi 25 50 75 100 125 rise / fall time vs. capacitive load MAX14611 toc11 rise/fall time (ns) 150 0 capacitive load (pf) 45 40 35 30 25 50 t lh t hl driving i/ovcc_ 500kbps, open-drain 1 2 3 4 5 propagation delay vs. capacitive load MAX14611 toc13 propagation delay (ns) 6 0 capacitive load (pf) 45 40 35 30 25 50 t phl t plh driving i/ovcc_ 500kbps, open-drain 1 2 3 4 6 7 8 9 5 rise / fall time vs. capacitive load MAX14611 toc12 rise / fall time (ns) 10 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ovcc_ 8mbps, push-pull t lh t hl propagation delay vs. capacitive load MAX14611 toc14 propagation delay (ns) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 capacitive load (pf) 45 40 35 30 25 50 t phl t plh driving i/ ovcc_ 8mbps, push-pull propagation delay vs. capacitive load MAX14611 toc09 propagation delay (ns) 1 2 3 4 5 6 7 8 0 capacitive load (pf) 45 40 35 30 25 50 t phl t plh driving i/ ovl_ 500kbps, open-drain 1 2 3 4 5 propagation delay vs. capacitive load MAX14611 toc10 propagation delay (ns) 6 0 capacitive load (pf) 45 40 35 30 25 50 t phl t plh driving i/ ovl_ 8mbps, push-pull MAX14611 quad bidirectional low-voltage logic-level translator
????????????????????????????????????????????????????????????????? maxim integrated products 9 typical operating characteristics (continued) (v cc = +3.3v, v l = 1.8v, r l = 1m, c l = 15pf, t a = +25c, data rate = 500kbps in open-drain operation and 8mbps in push-pull operation, unless otherwise noted.) 5 10 15 20 30 35 40 45 25 rise / fall time (ns) 50 0 rise / fall time vs. capacitive load MAX14611 toc17 capacitive load (pf) 45 40 35 30 25 50 driving i/ovl_ 4mbps, open-drain 1ki external pullup t lh t hl 5 10 15 20 30 35 40 45 25 rise / fall time vs. capacitive load MAX14611 toc15 rise / fall time (ns) 50 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ovcc_ 4mbps, open-drain 1ki external pullup t lh t hl low-to-high transition, open-drain zoom MAX14611 toc19 4ns / div -6 -2 0 2 4 -4 supply current (a) 6 -8 propagation delay vs. capacitive load MAX14611 toc18 capacitive load (pf) 45 40 35 30 25 50 driving i/ovcc_ 4mbps, open-drain 1ki external pullup 50% i/ o vcc_ to 50% i/ ovl_ (see toc19) t phl t plh 4 8 12 16 propagation delay vs. capacitive load MAX14611 toc16 propagation delay (ns) 20 0 capacitive load (pf) 45 40 35 30 25 50 driving i/ovl_ 4mbps, open-drain 1ki external pullup t plh t phl entering and exiting three-state mode (driving i/ ovcc_, c load = 50pf) MAX14611 toc20 10ms / div MAX14611 quad bidirectional low-voltage logic-level translator
???????????????????????????????????????????????????????????????? maxim integrated products 10 MAX14611 quad bidirectional low-voltage logic-level translator pin description pin configurations pin name function tdfn-ep tssop 1 2 i/ovl1 input/output 1. reference to v l . 2 3 i/ovl2 input/output 2. reference to v l . 3 8 ts three-state select input. drive ts low to place the device in three-state output mode. i/ovcc_ and i/ovl_ are high impedance in three-state output mode. note: logic referenced to v l (for logic thresholds, see the electrical characteristics table). 4, 11 6,9 n.c. no connection. not internally connected. 5 4 i/ovl3 input/output 3. reference to v l . 6 5 i/ovl4 input/output 4. reference to v l . 7 7 gnd ground 8 10 i/ovcc4 input/output 4. reference to v cc. 9 11 i/ovcc3 input/output 3. reference to v cc . 10 1 v l logic supply voltage input, 0.9v p v l p min (5.0v, (v cc + 0.3v)). connect a 0.1 f f ceramic capacitor as close as possible to the pin. 12 12 i/ovcc2 input/output 2. reference to v cc . 13 13 i/ovcc1 input/output 1. reference to v cc . 14 14 v cc power supply input. the supply range is 1.65v p v cc p 5.5v. bypass v cc with a 1 f f ceramic capacitor as close as possible to the pin to achieve higher esd protection ( q 6kv hbm). ep exposed pad (tdfn only). ep is internally connected to gnd. connect to a large ground plane to maximize thermal performance. not intended as an electrical connection point. *ep *connect exposed pad to gnd. tdfn top view 2 4 5 13 11 10 i/ ovcc1 n.c. v l i/ ovl2 n.c. i/ ovl3 1 + 14 v cc i/ ovl1 3 12 i/ ovcc2 ts 6 9 i/ ovcc3 i/ ovl4 7 8 i/ ovcc4 gnd 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i/ ovcc1 i/ ovcc2 i/ ovcc3 i/ ovl3 i/ ovl2 i/ ovl1 v l MAX14611 MAX14611 i/ ovcc4 n.c. ts gnd n.c. i/ ovl4 tssop +
???????????????????????????????????????????????????????????????? maxim integrated products 11 MAX14611 quad bidirectional low-voltage logic-level translator detailed description the MAX14611 esd-protected level translator provides the level shifting necessary to allow data transfer in a multivoltage system. externally applied voltages, v cc and v l , set the logic levels on either side of the device. a low-voltage logic signal present on the v l side of the device appears as a high-voltage logic signal on the v cc side of the device, and vice-versa. the MAX14611 bidirectional level translator uti - lizes a transmission-gate based design (see the functional diagram ) to allow data translation in either direction (v l ? v cc ) on any single data line. the device accepts v l from +0.9v to +5.0v and v cc from +1.65v to +5.5v, making it ideal for data transfer between low- voltage asics/plds and higher voltage systems. the device features a three-state output mode, thermal short-circuit protection, and q 6kv esd protection on the v cc side for greater protection in applications that route signals externally. level translation for proper operation, ensure that +1.65v p v cc p +5.5v, 0.9v p v l p 5.0v, and v l p (v cc + 0.3v). it is permissible for v l to exceed (v cc + 0.3v) during power-up sequenc - ing. during power-supply sequencing, when v cc is disconnected and v l is powered up, a current can be sourced without a latchup or any damage to the device. the maximum data rate of the MAX14611 depends heavily on load capacitance (see the typical operating characteristics ), output impedance of the driver, and the operational voltage (see the timing characteristics table). speed-up circuitry the device features a one-shot generator that decreases the rise time of the output. when triggered following a ris - ing edge, mosfets pu1 and pu2 turn on for a short time to pull up i/ovl_ and i/ovcc_ to their respective sup - plies (see the functional diagram ). this greatly reduces the rise time and propagation delay for the low-to-high transition. functional diagram i /ovl_ pu1 pu2 v l ts v cc i/ ovcc_ MAX14611 one-shot block n en control block gate drive one-shot block
???????????????????????????????????????????????????????????????? maxim integrated products 12 MAX14611 quad bidirectional low-voltage logic-level translator rise-time accelerators ( figure 5 ) the device has internal rise-time accelerators, allowing operation up to 20mbps. the rise-time accelerators are present on both sides of the device and act to speed up the rise time of the input and output of the device, regardless of the direction of the data. the triggering mechanism for these accelerators is both level and edge sensitive. to prevent false triggering of the rise-time accelerators and to take full advantage of them, signal rise/fall times of less than 2ns/v are recommended for both sides of the device in open-drain driving. the rec - ommendation applies only for fail time. under less noisy conditions, longer signal fall times can be acceptable. three-state output mode ( ts ) drive ts low to place the device in three-state output mode. connect ts to v l (logic-high) for normal opera - tion. activating the three-state output mode disconnects the internal 10k i pullup resistors on the i/ovcc_ and i/ovl_ lines. this forces the i/o lines to a high-impedance state and decreases the supply current to less than 1 f a. the high-impedance i/o lines in three-state output mode allow for use in a multidrop network. when in three-state output mode, keep the i/ovl_ voltage below (v l + 0.3v), and keep the i/ovcc_ voltage below (v cc + 0.3v). thermal short-circuit protection thermal-overload detection protects the device from short-circuit fault conditions. in the event of a short-circuit fault and when the junction temperature (t j ) reaches +150 n c (typ), a thermal sensor signals the three-state output mode logic to force the device into three-state out - put mode. when t j has cooled to +130 n c (typ), normal operation resumes. high esd protection as with all maxim devices, esd-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. the i/ovcc_ lines have extra protection against static electricity. maxims engineers have developed state-of- the-art structures to protect these pins against esd of 6kv without damage. the esd structures withstand high esd in all states: normal operation, three-state output mode, and powered down. after an esd event, the device keeps working without latchup, whereas competing products can latch and must be powered down to remove latchup. esd pro - tection can be tested in various ways. the i/ovcc_ lines of this product family are characterized for protection.to 6kv using the human body model. esd test conditions contact maxim for a reliability report that documents test setup, test methodology, and test results. applications information power-supply decoupling bypass v l to ground with a 0.1 f f capacitor to reduce ripple and ensure correct data transmission. see the typical operating circuit . to ensure full q 6kv esd protection, bypass v cc to ground with a 1 f f capacitor. place all capacitors as close as possible to the power- supply pins (v cc and v l ). push-pull vs. open-drain driving the device can be driven in a push-pull configuration. the device includes internal 10k i resistors that pull up i/ovl_ and i/ovcc_ to their respective power sup - plies, allowing operation of the i/o lines with open-drain devices. see the timing characteristics table for maxi - mum data rates when using open-drain drivers ( figure 1 , figure 2 , figure 3 , figure 4 ).
???????????????????????????????????????????????????????????????? maxim integrated products 13 MAX14611 quad bidirectional low-voltage logic-level translator applications circuit figure 5. open-drain operation ts i /ovl1 i /ovl2 i /ovl3 data data i /ovl4 i/ ovcc1 +1.8v +3.3v v l v cc +3.3v system i/ ovcc2 i/ ovcc3 i/ ovcc4 +1.8v system controller 0.1f 1f MAX14611 ts i /ovl1 i /ovl2 i /ovl3 i /ovl4 en sda sda i/ ovcc1 scl sda scl v l v l = +1.8v v cc = +3.3v v l v cc gnd gnd gnd +3.3v system v cc v l v l v l scl sda scl i/ ovcc2 i/ ovcc3 i/ ovcc4 v cc v cc +1.8v system controller 0.1f 1f v cc MAX14611
???????????????????????????????????????????????????????????????? maxim integrated products 14 MAX14611 quad bidirectional low-voltage logic-level translator + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. ** future productcontact factory for availability. ordering information chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. part temp range pin-package MAX14611etd+ -40 n c to +85 n c 14 tdfn-ep* MAX14611eud+** -40 n c to +85 n c 14 tssop package type package code outline no. land pattern no. 14 tdfn-ep t1433+2 21-0137 90-0063 14 tssop u14+1 21-0066 90-0113
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 15 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 4/12 initial release MAX14611 quad bidirectional low-voltage logic-level translator

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